โ† ์ตœ์‹  ํ”„๋กœ๋•ํŠธ

A tiny and platform-agnostic true random number generator for FPGA/ASIC

๐ŸŽฒ A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC). It is based on phase noise, consumes less than 60 LUT4s/FFs and achieves up to 7.99 bits of entropy per byte.

์˜คํ”ˆ์†Œ์Šค

231 ์Šคํƒ€ ยท GitHub์™ธ๋ถ€ ์‚ฌ์ดํŠธ

github.com ๋ฐฉ๋ฌธ์™ธ๋ถ€ ์‚ฌ์ดํŠธ

๋ฐ˜์‘ (1)

๋น„์Šทํ•œ ํ”„๋กœ๋•ํŠธ

์„ค๋ช…์ด ๋น„์Šทํ•œ ์ˆœ

  1. I built a hardware quantum RNG and wired it into a Magic 8-Ball

    dnhkng.github.io

    ML, Biotech, Hardware, and Coordination Problems. Sometimes I write about hard problems and how to solve them.

    Hacker News13์ 

  2. Fast Random Library for C++17

    github.com

    Collection of self-contained header-only libraries for C++17

    Hacker News68์ 

  3. A nibble-oriented CPU in Verilog to build a scientific calculator

    github.com

    From FPGA Gates to Scientific Calculator

    Hacker News119์ 

  4. A tiny LLM running at 21,000 tok/s on a $250 FPGA (Live Demo)

    mikeayles.com

    Hacker News79์ 

  5. Double blind entropy using Drand for verifiably fair randomness

    blockrand.net

    The only way to get a trust-less random value is to have it distributed and time-locked three ways, player, server and a future-entropy.

    Hacker News21์ 